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FINAL
AM27C040
4 Megabit (512 K x 8-Bit) CMOS EPROM
DISTINCTIVE CHARACTERISTICS
s Fast access time -- Available in speed options as fast as 90 ns s Low power consumption -- <10 A typical CMOS standby current s JEDEC-approved pinout -- Plug-in upgrade for 1 Mbit and 2 Mbit EPROMs -- Easy upgrade from 28-pin JEDEC EPROMs s Single +5 V power supply s 10% power supply tolerance standard s 100% FlashriteTM programming -- Typical programming time of 1 minute s Latch-up protected to 100 mA from -1 V to VCC + 1 V s High noise immunity s Compact 32-pin DIP, PDIP, PLCC packages
GENERAL DESCRIPTION
The AM27C040 is a 4 Mbit ultraviolet erasable programmable read-only memory. It is organized as 512K bytes, operates from a single +5 V supply, has a static standby mode, and features fast single address location programming. The device is available in windowed ceramic DIP packages and plastic one-time programmable (OTP) packages. Data can be typically accessed in less than 90 ns, allowing high-performance microprocessors to operate without any WAIT states. The device offers separate Output Enable (OE#) and Chip Enable (CE#) controls, thus eliminating bus contention in a multiple bus microprocessor system. AMD's CMOS process technology provides high speed, low power, and high noise immunity. Typical power consumption is only 100 mW in active mode, and 50 W in standby mode. All signals are TTL levels, including programming signals. Bit locations may be programmed singly, in blocks, or at random. The device supports AMD's Flashrite programming algorithm (100 s pulses) resulting in typical programming time of 1 minute.
BLOCK DIAGRAM
VCC VSS VPP OE# Output Enable Chip Enable and Prog Logic Y Decoder A0-A18 Address Inputs Data Outputs DQ0-DQ7
Output Buffers
CE#/PGM#
Y Gating
X Decoder
4,194,304-Bit Cell Matrix
14971G-1
Publication# 14971 Rev: G Amendment/0 Issue Date: May 1998
FINAL
PRODUCT SELECTOR GUIDE
Family Part Number Speed Options (VCC = 5.0 V 10%) Max Access Time (ns) CE# (E#) Access (ns) OE# (G#) Access (ns) -90 90 90 40 AM27C040 -120 120 120 50 -150 150 150 65 -200 200 200 75
CONNECTION DIAGRAMS Top View
DIP
A12 A15 A16 VPP
PLCC
VCC A18 A17 29 28 27 26 25 24 23 22 21 14 15 16 17 18 19 20 DQ1 DQ2 VSS DQ3 DQ4 DQ5 DQ6
VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC A18 A17 A14 A13 A8 A9 A11 OE# (G#) A10 CE# (E#)/PGM# (P#) DQ7 DQ6 DQ5 DQ4 DQ3 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 5 6 7 8 9 10 11 12 13
4
3
2 1 32 31 30 A14 A13 A8 A9 A11 OE# (G#) A10 CE# (E#)/PGM# (P#) DQ7
14971G-3
14971G-2
Notes: 1. JEDEC nomenclature is in parenthesis. 2. The 32-pin DIP to 32-pin PLCC configuration varies from the JEDEC 28-pin DIP to 32-pin PLCC configuration.
PIN DESIGNATIONS
A0-A18 = Address Inputs Chip Enable/Program Enable Input Data Inputs/Outputs Output Enable Input VCC Supply Voltage Program Voltage Input GroundLogic Symbol CE# (E#)/PGM# (P#)= DQ0-DQ7 OE# (G#) VCC VPP VSS = = = = =
LOGIC SYMBOL
19 A0-A18 DQ0-DQ7 CE# (E#)/PGM#(P#) OE# (G#) 8
14971E-4
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AM27C040
FINAL
ORDERING INFORMATION UV EPROM Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of:
AM27C040
-90
D
C OPTIONAL PROCESSING Blank = Standard Processing B = Burn-In TEMPERATURE RANGE C = Commercial (0C to +70C) I = Industrial (-40C to +85C) E = Extended (-55C to +125C) PACKAGE TYPE D = 32-Pin Ceramic DIP (CDV032) SPEED OPTION See Product Selector Guide and Valid Combinations
DEVICE NUMBER/DESCRIPTION AM27C040 4 Megabit (512K x 8-Bit) CMOS UV EPROM
Valid Combinations Valid Combinations AM27C040-90 AM27C040-120 DC, DCB, DI, DIB, DE, DEB AM27C040-150 AM27C040-200 Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.
AM27C040
3
FINAL
ORDERING INFORMATION OTP EPROM Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of:
AM27C040
-90
J
C OPTIONAL PROCESSING Blank = Standard Processing TEMPERATURE RANGE C = Commercial (0C to +70C) I = Industrial (-40C to +85C) E = Extended (-55C to 125C) PACKAGE TYPE P = 32-Pin Plastic DIP (PD 032) J = 32-Pin Rectangular Plastic Leaded Chip Carrier (PL 032) SPEED OPTION See Product Selector Guide and Valid Combinations
DEVICE NUMBER/DESCRIPTION AM27C040 4 Megabit (512K x 8-Bit) CMOS OTP EPROM
Valid Combinations AM27C040-90 AM27C040-120 PC, PI, JC, JI AM27C040-150 AM27C040-200
Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.
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AM27C040
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FUNCTIONAL DESCRIPTION Device Erasure
In order to clear all locations of their programmed contents, the device must be exposed to an ultraviolet light source. A dosage of 15 W seconds/cm2 is required to completely erase the device. This dosage can be obtained by exposure to an ultraviolet lamp -- wavelength of 2537 A -- with intensity of 12,000 W/cm2 for 15 to 20 minutes. The device should be directly under and about one inch from the source and all filters should be removed from the UV light source prior to erasure. Note that all UV erasable devices will erase with light sources having wavelengths shorter than 4000 A, such as fluorescent light and sunlight. Although the erasure process happens over a much longer time period, exposure to any light source should be prevented for maximum system reliability. Simply cover the package window with an opaque label or substance.
that particular device. A high-level CE#/PGM# input inhibits the other devices from being programmed.
Program Verify
A verification should be performed on the programmed bits to determine that they were correctly programmed. The verify should be performed with OE# at VIL, CE#/ PGM# at VIH, and VPP between 12.5 V and 13.0 V.
Auto Select Mode
The autoselect mode provides manufacturer and device identification through identifier codes on DQ0- DQ7. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding programming algorithm. This mode is functional in the 25C 5C ambient temperature range that is required when programming the device. To activate this mode, the programming equipment must force VH on address line A9. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH (that is, changing the address from 00h to 01h). All other address lines must be held at VIL during the autoselect mode. Byte 0 (A0 = VIL) represents the manufacturer code, and Byte 1 (A0 = VIH), the device identifier code. Both codes have odd parity, with DQ7 as the parity bit.
Device Programming
Upon delivery, or after each erasure, the device has all of its bits in the "ONE", or HIGH state. "ZEROs" are loaded into the device through the programming procedure. The programming mode is entered when 12.75 V 0.25 V is applied to the VPP pin, CE#/PGM# is at VIL and OE# is at VIH . For programming, the data to be programmed is applied 8 bits in parallel to the data output pins. The flowchart in the EPROM Products Data Book, Programming section (Section 5, Figure 5-1) shows AMD's Flashrite algorithm. The Flashrite algorithm reduces programming time by using a 100 s programming pulse and by giving each address only as many pulses to reliably program the data. After each pulse is applied to a given address, the data in that address is verified. If the data does not verify, additional pulses are given until it verifies or the maximum pulses allowed is reached. This process is repeated while sequencing through each address of the device. This part of the algorithm is done at VCC = 6.25 V to assure that each EPROM bit is programmed to a sufficiently high threshold voltage. After the final address is completed, the entire EPROM memory is verified at VCC = VPP = 5.25 V. Please refer to the EPROM Products Data Book, Section 5 for the programming flow chart and characteristics.
Read Mode
To obtain data at the device outputs, Chip Enable (CE#/ PGM#) and Output Enable (OE#) must be driven low. CE#/PGM# controls the power to the device and is typically used to select the device. OE# enables the device to output data, independent of device selection. Addresses must be stable for at least tACC-tOE. Refer to the Switching Waveforms section for the timing diagram.
Standby Mode
The device enters the CMOS standby mode when CE#/PGM# is at VCC 0.3 V. Maximum VCC current is reduced to 100 A. The device enters the TTL-standby mode when CE#/PGM# is at VIH. Maximum VCC current is reduced to 1.0 mA. When in either standby mode, the device places its outputs in a high-impedance state, independent of the OE# input.
Output OR-Tieing
To accommodate multiple memory connections, a two-line control function is provided to allow for: s Low memory power dissipation, and s Assurance that output bus contention will not occur CE#/PGM# should be decoded and used as the primary device-selecting function, while OE# be made a
Program Inhibit
Programming different data to multiple devices in parallel is easily accomplished. Except for CE#/PGM#, all like inputs of the devices may be common. A TTL low-level program pulse applied to one device's CE#/ PGM# input with VPP = 12.75 V 0.25 V will program
AM27C040
5
FINAL common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device. these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 F ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and VSS to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 F bulk electrolytic capacitor should be used between VCC and VSS for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array.
System Applications
During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of
MODE SELECT TABLE
Mode Read Output Disable Standby (TTL) Standby (CMOS) Program Program Verify Program Inhibit Auto Select (Note 3) Manufacturer Code Device Code CE#/PGM# VIL VIL VIH VCC + 0.3 V VIL VIL VIH VIL VIL OE# VIL VIH X X VIH VIL X VIL VIL A0 X X X X X X X VIL VIH A9 X X X X X X X VH VH VPP X X X X VPP VPP VPP X X Outputs DOUT HIGH Z HIGH Z HIGH Z DIN DOUT HIGH Z 01h 9Bh
Note: 1. VH = 12.0 V 0.5 V. 2. X = Either VIH or VIL 3. A1 - A8 = A10 - A18 = VIL 4. See DC Programming Characteristics in the EPROM Products Data Book for VPP voltage during programming
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AM27C040
FINAL
ABSOLUTE MAXIMUM RATINGS
Storage Temperature OTP Products . . . . . . . . . . . . . . . . -65C to +125C All Other Products. . . . . . . . . . . . . -65C to +150C Ambient Temperature with Power Applied. . . . . . . . . . . . . .-55C to + 125C Voltage with Respect to VSS All pins except A9, VPP, VCC (Note 1) . . . . . . . . . . . . . . -0.6 V to VCC +0.5 V A9 and VPP (Note 2) . . . . . . . . . . . .-0.6 V to +13.5 V VCC . . . . . . . . . . . . . . . . . . . . . . . . . .-0.6 V to +7.0 V
1. During voltage transitions, inputs may overshoot VSS to - 2.0 V for periods of up to 20 ns. Maximum DC voltage on input and I/O pins may overshoot to V CC + 2.0 V for periods up to 20ns. 2. During voltage transitions, A9 and V PP may overshoot V SS to -2.0 V for periods of up to 20 ns. A9 and VPP must not exceed +13.5 V at any time. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.
OPERATING RANGES
Commercial (C) Devices Ambient Temperature (TA) . . . . . . . . . . .0C to +70C Industrial (I) Devices Ambient Temperature (TA) . . . . . . . . .-40C to +85C Extended (E) Devices Ambient Temperature (TA) . . . . . . . .-55C to +125C Supply Read Voltages VCC for 5% devices . . . . . . . . . . +4.75 V to +5.25 V VCC for 10% devices . . . . . . . . . +4.50 V to +5.50 V
Operating ranges define those limits between which the functionality of the device is guaranteed.
AM27C040
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FINAL
DC CHARACTERISTICS over operating ranges unless otherwise specified
Parameter Symbol VOH VOL VIH VIL ILI ILO ICC1 ICC2 ICC3 IPP1 Parameter Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current VIN = 0 V to VCC C/I Devices E Devices Output Leakage Current VCC Active Current (Note 3) VCC TTL Standby Current VCC CMOS Standby Current VPP Current During Read VOUT = 0 V to VCC CE# = VIL, f = 10 MHz, C/I Devices IOUT = 0 MA CE# = VIH CE# = VCC 0.3 V CE# = OE# = VIL, VPP = VCC E Devices Test Conditions IOH = -400 A IOL = 2.1 mA 2.0 -0.5 Min 2.4 0.45 VCC + 0.5 +0.8 1.0 A 5.0 5.0 40 mA 60 1.0 100 100 mA A A A Max Unit V V V V
Caution: The device must not be removed from (or inserted into) a socket when VCC or VPP is applied. Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP 2. ICC1 is tested with OE# = VIH to simulate open outputs. 3. Minimum DC Input Voltage is -0.5. During transitions, the inputs may overshoot to -2.0 V for periods less than 20 ns. Maximum DC Voltage on output pins is Vcc +0.5 V, which may overshoot to VCC +2.0 V for periods less than 20 ns.
25 20
25 20 Supply Current
Supply Current
in mA
in mA
15
15
10 5 1 2 6 3 4 5 Frequency in MHz 7 8 9 10
10 5 -75 -50 -25
0 25 50 75 Temperature in C
100 125 150
Figure 1.
Typical Supply Current vs. Frequency VCC = 5.5 V, T = 25C
14971E-1
Figure 2.
Typical Supply Current vs. Temperature VCC = 5.5 V, f = 10 MHz
14971E-1
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AM27C040
FINAL
TEST CONDITIONS
5.0 V
Table 1.
Test Specifications
All 1 TTL gate 100 20 0.45-2.4 0.8, 2.0 0.8, 2.0 pF ns V V V Unit
Test Condition Device Under Test CL 6.2 k Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels 2.7 k Output Load Output Load Capacitance, CL (including jig capacitance)
Note: Diodes are IN3064 or equivalents.
14971G-5
Output timing measurement reference levels
Figure 1.
Test Setup
SWITCHING TEST WAVEFORM
3V 1.5 V 0V Input Output Test Points 1.5 V 0.8 V 0.45 V Input Output 2.4 V 2.0 V Test Points 0.8 V 2.0 V
Note: For CL = 30 pF.
Note: For CL = 100 pF.
14971G-6
KEY TO SWITCHING WAVEFORMS
WAVEFORM INPUTS Steady Changing from H to L Changing from L to H Don't Care, Any Change Permitted Does Not Apply Changing, State Unknown Center Line is High Impedance State (High Z) OUTPUTS
KS000010-PAL
AM27C040
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FINAL
AC CHARACTERISTICS
Parameter Symbols JEDEC tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX Std. tACC tCE tOE Description Address to Output Delay Chip Enable to Output Delay Output Enable to Output Delay Test Setup CE# = OE# Max = VIL OE# = VIL CE# = VIL Max Max Max Min -90 90 90 40 30 0 AM27C040 -120 120 120 50 30 0 -150 150 150 65 30 0 -200 200 200 75 40 0 Unit ns ns ns ns ns
tDF Chip Enable High or Output Enable High, (Note 2) Whichever Occurs First, to Output High Z tOH Output Hold Time from Addresses, CE# or OE#, Whichever Occurs First
Caution: Do not remove the device from (or inserted into) a socket when VCC or VPP is applied. Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.
2. This parameter is sampled and not 100% tested. 3. Switching characteristics are over operating range, unless otherwise specified.
4. See Figure 1 and Table 1 for test specifications.
SWITCHING WAVEFORMS
2.4 Addresses 0.45 CE#/PGM# tCE OE# tOE tOH Valid Output tDF (Note 2) High Z
14971E-1
2.0 0.8
Addresses Valid
2.0 0.8
Output
High Z
tACC (Note 1)
Note:
1. OE# may be delayed up to tACC - tOE after the falling edge of the addresses without impact on tACC. 2. tDF is specified from OE# or CE#, whichever occurs first.
PACKAGE CAPACITANCE
Parameter Symbol CIN COUT Parameter Description Input Capacitance Test Conditions VIN = 0 V CDV032 Typ 10 12 Max 12 15 PD 032 Typ 10 12 Max 12 15 PL 032 Typ 8 9 Max 10 12 Unit pF pF
Output Capacitance VOUT = 0 V
Notes: 1. This parameter is only sampled and not 100% tested. 2. TA = +25C, f = 1 MHz.
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AM27C040
FINAL
PHYSICAL DIMENSIONS PD 032--32-Pin Plastic Dual In-Line Package (measured in inches)
1.640 1.670 32 17 .530 .580 16 .045 .065 .140 .225 .005 MIN 0 10 .630 .700 .009 .015 .600 .625
Pin 1 I.D.
SEATING PLANE .120 .160 .090 .110 .016 .022 .015 .060
16-038-S_AG PD 032 EC75 5-28-97 lv
PL 032--32-Pin Plastic Leaded Chip Carrier (measured in inches)
.447 .453 .485 .495 .009 .015 .125 .140 .080 .095 SEATING PLANE .400 REF. .013 .021 .026 .032 TOP VIEW .050 REF. .490 .530 .042 .056
.585 .595 .547 .553
Pin 1 I.D.
SIDE VIEW
16-038FPO-5 PL 032 DA79 6-28-94 ae
AM27C040
11
FINAL
PHYSICAL DIMENSIONS* CDV032--32-Pin Ceramic DIP, UV Lens (measured in inches)
DATUM D CENTER PLANE
1
UV Lens .565 .605
INDEX AND TERMINAL NO. 1 I.D. AREA
TOP VIEW DATUM D CENTER PLANE 1.635 1.680 BASE PLANE SEATING PLANE .160 .220 .015 .060 .125 .200 .300 BSC .045 .065 .014 .026 .600 BSC .100 BSC .008 .018 .700 MAX
94 105
.005 MIN
SIDE VIEW
END VIEW
16-000038H-3 CDV032 DF11 3-30-95 ae
* For reference only. BSC is an ANSI standard for Basic Space Centering.
REVISION SUMMARY FOR AM27C040 Revision E/1
Product Selector Guide: Added -90 (90 ns, 10% VCC) and deleted -100 speed options. Ordering Information, UV EPROM Products: The -90 part number is now listed in the example.
Valid Combinations: Added -90 and deleted -100 speed options in valid combinations.
Ordering Information, OTP EPROM Products: The -90 part number is now listed in the example.
Valid Combinations: Added -90 and deleted -100 speed options in valid combinations.
Programming the AM27C040: The fourth paragraph should read, "Please refer to Section 5 for programming...".
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AM27C040
FINAL Operating Ranges: Changed Supply Read Voltages listings to match those in the Product Selector Guide. AC Characteristics: Added -90 and deleted -100 speed options in table, rearranged notes, moved text from table title to Note 4, renamed table.
OTP EPROM Products: Changed -75 speed option to -90. Temperature Range: Added "E = Extended (-55C to 125C)". Package Type: Deleted "E = 32-pin Thin Small Outline Package (TSOP) Standard Pinout (TS 032)". Valid Combinations: Deleted EC and EI options.
Functional Description: Replaced device specific text with generic text. Test Conditions: New section with Test Setup Figure and Test Specifications Table. Switching Test Waveform: Modified figure. Operating Ranges:
Revision F
Deleted -255 speed option. Changed all active low signal designations from overbars or trailing "#"s.
Revision G
Global Made formatting and layout consistent with other data sheets. Used updated common tables and diagrams. Distinctive Characteristics:
Supply Read Voltages: Replaced with generic data.
DC Characteristics: Modified Figures 1 and 2. Switching Waveform: Corrected "DF" to "tDF" in Note 2. Package Capacitance: Deleted TSOP data. Physical Dimensions: New section, added figures for the 32-Pin Ceramic DIP, 32-Pin Plastic DIP, and 32-Pin Plastic Leaded Chip Carrier.
Low Power Consumption: Changed "100 A maximum" to "<10 A typical".
TSOP package deleted. General Description: In the third paragraph, changed "100 W in standby mode" to 50 W in standby mode". Connection Diagrams: Deleted TSOP Pinout figure. Pin Designations: Changed "Chip Enable Input" to "Chip Enable/Program Enable Input". Ordering Information:
UV EPROM Products: Changed -75 speed option to -90.
Trademarks
Copyright (c) 1998 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Flashrite is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
AM27C040
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